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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains configuration information for the device.  <a href="struct_x_dma_ps___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html">XDmaPs_ChanCtrl</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA channle control structure.  <a href="struct_x_dma_ps___chan_ctrl.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___b_d.html">XDmaPs_BD</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA block descriptor stucture.  <a href="struct_x_dma_ps___b_d.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">A DMA command consisits of a channel control struct, a block descriptor, a user defined program, a pointer pointing to generated DMA program, and execution result.  <a href="struct_x_dma_ps___cmd.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___prog_buf.html">XDmaPs_ProgBuf</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_dma_ps___prog_buf.html" title="The XDmaPs_ProgBuf is the struct for a DMA program buffer. ">XDmaPs_ProgBuf</a> is the struct for a DMA program buffer.  <a href="struct_x_dma_ps___prog_buf.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___channel_data.html">XDmaPs_ChannelData</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_dma_ps___channel_data.html" title="The XDmaPs_ChannelData is a struct to book keep individual channel of the DMAC. ">XDmaPs_ChannelData</a> is a struct to book keep individual channel of the DMAC.  <a href="struct_x_dma_ps___channel_data.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> driver instance data structure.  <a href="struct_x_dma_ps.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gae19e877d6bba369f3e2e8e806b36f594"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gae19e877d6bba369f3e2e8e806b36f594">XDmaPs_WriteReg</a>(BaseAddress, RegOffset, RegisterValue)&#160;&#160;&#160;Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))</td></tr>
<tr class="memdesc:gae19e877d6bba369f3e2e8e806b36f594"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write a DMAC register.  <a href="#gae19e877d6bba369f3e2e8e806b36f594">More...</a><br/></td></tr>
<tr class="separator:gae19e877d6bba369f3e2e8e806b36f594"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:gad59232da2016e1a60744cc6e11a04a98"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gad59232da2016e1a60744cc6e11a04a98">XDmaPsDoneHandler</a> )(unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *DmaCmd, void *CallbackRef)</td></tr>
<tr class="memdesc:gad59232da2016e1a60744cc6e11a04a98"><td class="mdescLeft">&#160;</td><td class="mdescRight">It's the done handler a user can set for a channel.  <a href="#gad59232da2016e1a60744cc6e11a04a98">More...</a><br/></td></tr>
<tr class="separator:gad59232da2016e1a60744cc6e11a04a98"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5dba8cc7cd39c53eed1dabac803ce74f"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga5dba8cc7cd39c53eed1dabac803ce74f">XDmaPsFaultHandler</a> )(unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *DmaCmd, void *CallbackRef)</td></tr>
<tr class="memdesc:ga5dba8cc7cd39c53eed1dabac803ce74f"><td class="mdescLeft">&#160;</td><td class="mdescRight">It's the fault handler a user can set for a channel.  <a href="#ga5dba8cc7cd39c53eed1dabac803ce74f">More...</a><br/></td></tr>
<tr class="separator:ga5dba8cc7cd39c53eed1dabac803ce74f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga2fed90dfba1ff9f472b40ed492d78b4c"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga2fed90dfba1ff9f472b40ed492d78b4c">XDmaPs_CfgInitialize</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, <a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a> *Config, u32 EffectiveAddr)</td></tr>
<tr class="memdesc:ga2fed90dfba1ff9f472b40ed492d78b4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes a specific <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> instance such that it is ready to be used.  <a href="#ga2fed90dfba1ff9f472b40ed492d78b4c">More...</a><br/></td></tr>
<tr class="separator:ga2fed90dfba1ff9f472b40ed492d78b4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga65cc22a994eb1ca6a9c56d86d469242e"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga65cc22a994eb1ca6a9c56d86d469242e">XDmaPs_ResetManager</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga65cc22a994eb1ca6a9c56d86d469242e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the DMA Manager.  <a href="#ga65cc22a994eb1ca6a9c56d86d469242e">More...</a><br/></td></tr>
<tr class="separator:ga65cc22a994eb1ca6a9c56d86d469242e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga593458e8f6ac55566fc235e8a93b9890"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga593458e8f6ac55566fc235e8a93b9890">XDmaPs_ResetChannel</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, unsigned int Channel)</td></tr>
<tr class="memdesc:ga593458e8f6ac55566fc235e8a93b9890"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the specified DMA Channel.  <a href="#ga593458e8f6ac55566fc235e8a93b9890">More...</a><br/></td></tr>
<tr class="separator:ga593458e8f6ac55566fc235e8a93b9890"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae1f2b39fb5e2e8d369c3286aeada67be"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gae1f2b39fb5e2e8d369c3286aeada67be">XDmaPs_FaultISR</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:gae1f2b39fb5e2e8d369c3286aeada67be"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver fault interrupt service routine This is the one that connects the GIC.  <a href="#gae1f2b39fb5e2e8d369c3286aeada67be">More...</a><br/></td></tr>
<tr class="separator:gae1f2b39fb5e2e8d369c3286aeada67be"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaccf32b08856fbe62745a4d0552aa1bff"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gaccf32b08856fbe62745a4d0552aa1bff">XDmaPs_SetDoneHandler</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, unsigned Channel, <a class="el" href="group__dmaps.html#gad59232da2016e1a60744cc6e11a04a98">XDmaPsDoneHandler</a> DoneHandler, void *CallbackRef)</td></tr>
<tr class="memdesc:gaccf32b08856fbe62745a4d0552aa1bff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the done handler for a channel.  <a href="#gaccf32b08856fbe62745a4d0552aa1bff">More...</a><br/></td></tr>
<tr class="separator:gaccf32b08856fbe62745a4d0552aa1bff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacda5c5523ed24451a7efacc7b9257fa3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gacda5c5523ed24451a7efacc7b9257fa3">XDmaPs_SetFaultHandler</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, <a class="el" href="group__dmaps.html#ga5dba8cc7cd39c53eed1dabac803ce74f">XDmaPsFaultHandler</a> FaultHandler, void *CallbackRef)</td></tr>
<tr class="memdesc:gacda5c5523ed24451a7efacc7b9257fa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the fault handler for a channel.  <a href="#gacda5c5523ed24451a7efacc7b9257fa3">More...</a><br/></td></tr>
<tr class="separator:gacda5c5523ed24451a7efacc7b9257fa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa69b5ac5fd75de6d5d0b1039d7151573"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gaa69b5ac5fd75de6d5d0b1039d7151573">XDmaPs_Instr_DMARMB</a> (char *DmaProg)</td></tr>
<tr class="memdesc:gaa69b5ac5fd75de6d5d0b1039d7151573"><td class="mdescLeft">&#160;</td><td class="mdescRight">Construction function for DMARMB instruction.  <a href="#gaa69b5ac5fd75de6d5d0b1039d7151573">More...</a><br/></td></tr>
<tr class="separator:gaa69b5ac5fd75de6d5d0b1039d7151573"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga92af9b1850b76f149a716a3f6907e951"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga92af9b1850b76f149a716a3f6907e951">XDmaPs_Instr_DMAWMB</a> (char *DmaProg)</td></tr>
<tr class="memdesc:ga92af9b1850b76f149a716a3f6907e951"><td class="mdescLeft">&#160;</td><td class="mdescRight">Construction function for DMAWMB instruction.  <a href="#ga92af9b1850b76f149a716a3f6907e951">More...</a><br/></td></tr>
<tr class="separator:ga92af9b1850b76f149a716a3f6907e951"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga68a8d4fbf7cf6154ad2c58df0479d329"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue</a> (<a class="el" href="struct_x_dma_ps___chan_ctrl.html">XDmaPs_ChanCtrl</a> *ChanCtrl)</td></tr>
<tr class="memdesc:ga68a8d4fbf7cf6154ad2c58df0479d329"><td class="mdescLeft">&#160;</td><td class="mdescRight">Conversion function from PL330 bus transfer descriptors to CCR value.  <a href="#ga68a8d4fbf7cf6154ad2c58df0479d329">More...</a><br/></td></tr>
<tr class="separator:ga68a8d4fbf7cf6154ad2c58df0479d329"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada17404db9934447c93bae5a66a71282"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gada17404db9934447c93bae5a66a71282">XDmaPs_ConstructSingleLoop</a> (char *DmaProgStart, int CacheLength, char *DmaProgLoopStart, int LoopCount)</td></tr>
<tr class="memdesc:gada17404db9934447c93bae5a66a71282"><td class="mdescLeft">&#160;</td><td class="mdescRight">Construct a loop with only DMALD and DMAST as the body using loop counter 0.  <a href="#gada17404db9934447c93bae5a66a71282">More...</a><br/></td></tr>
<tr class="separator:gada17404db9934447c93bae5a66a71282"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaecba56f06526fe2ad0c8af65ff4237bb"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gaecba56f06526fe2ad0c8af65ff4237bb">XDmaPs_ConstructNestedLoop</a> (char *DmaProgStart, int CacheLength, char *DmaProgLoopStart, unsigned int LoopCountOuter, unsigned int LoopCountInner)</td></tr>
<tr class="memdesc:gaecba56f06526fe2ad0c8af65ff4237bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Construct a nested loop with only DMALD and DMAST in the inner loop body.  <a href="#gaecba56f06526fe2ad0c8af65ff4237bb">More...</a><br/></td></tr>
<tr class="separator:gaecba56f06526fe2ad0c8af65ff4237bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc2e04f69037f0bdba33275ae017af8a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *Cmd)</td></tr>
<tr class="memdesc:gabc2e04f69037f0bdba33275ae017af8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generate a DMA program based for the DMA command, the buffer will be pointed by the GeneratedDmaProg field of the command.  <a href="#gabc2e04f69037f0bdba33275ae017af8a">More...</a><br/></td></tr>
<tr class="separator:gabc2e04f69037f0bdba33275ae017af8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96c4c2e45ab31a22f05767c24db425ea"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga96c4c2e45ab31a22f05767c24db425ea">XDmaPs_FreeDmaProg</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *Cmd)</td></tr>
<tr class="memdesc:ga96c4c2e45ab31a22f05767c24db425ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Free the DMA program buffer that is pointed by the GeneratedDmaProg field of the command.  <a href="#ga96c4c2e45ab31a22f05767c24db425ea">More...</a><br/></td></tr>
<tr class="separator:ga96c4c2e45ab31a22f05767c24db425ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3691ba115c788c4f68a05cf05c486eeb"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga3691ba115c788c4f68a05cf05c486eeb">XDmaPs_Start</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *Cmd, int HoldDmaProg)</td></tr>
<tr class="memdesc:ga3691ba115c788c4f68a05cf05c486eeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a DMA command.  <a href="#ga3691ba115c788c4f68a05cf05c486eeb">More...</a><br/></td></tr>
<tr class="separator:ga3691ba115c788c4f68a05cf05c486eeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga05047e523efd0dcc0e1f3ba16a32a796"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga05047e523efd0dcc0e1f3ba16a32a796">XDmaPs_IsActive</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr, unsigned int Channel)</td></tr>
<tr class="memdesc:ga05047e523efd0dcc0e1f3ba16a32a796"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks whether the DMA channel is active or idle.  <a href="#ga05047e523efd0dcc0e1f3ba16a32a796">More...</a><br/></td></tr>
<tr class="separator:ga05047e523efd0dcc0e1f3ba16a32a796"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20b05e6795a86f3381e6850a0ada0c6d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga20b05e6795a86f3381e6850a0ada0c6d">XDmaPs_DoneISR_0</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga20b05e6795a86f3381e6850a0ada0c6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 0.  <a href="#ga20b05e6795a86f3381e6850a0ada0c6d">More...</a><br/></td></tr>
<tr class="separator:ga20b05e6795a86f3381e6850a0ada0c6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga766bb579aeee8b0914fcb258a4057259"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga766bb579aeee8b0914fcb258a4057259">XDmaPs_DoneISR_1</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga766bb579aeee8b0914fcb258a4057259"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 1.  <a href="#ga766bb579aeee8b0914fcb258a4057259">More...</a><br/></td></tr>
<tr class="separator:ga766bb579aeee8b0914fcb258a4057259"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gada1623174e9c5bbb4bf247a650987dbd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gada1623174e9c5bbb4bf247a650987dbd">XDmaPs_DoneISR_2</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:gada1623174e9c5bbb4bf247a650987dbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 2.  <a href="#gada1623174e9c5bbb4bf247a650987dbd">More...</a><br/></td></tr>
<tr class="separator:gada1623174e9c5bbb4bf247a650987dbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6b98da80d55e109b0cb57a34f9baa5a9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga6b98da80d55e109b0cb57a34f9baa5a9">XDmaPs_DoneISR_3</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga6b98da80d55e109b0cb57a34f9baa5a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 3.  <a href="#ga6b98da80d55e109b0cb57a34f9baa5a9">More...</a><br/></td></tr>
<tr class="separator:ga6b98da80d55e109b0cb57a34f9baa5a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1a1f8340c3a0a64e8a2363c5fe752707"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga1a1f8340c3a0a64e8a2363c5fe752707">XDmaPs_DoneISR_4</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga1a1f8340c3a0a64e8a2363c5fe752707"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 4.  <a href="#ga1a1f8340c3a0a64e8a2363c5fe752707">More...</a><br/></td></tr>
<tr class="separator:ga1a1f8340c3a0a64e8a2363c5fe752707"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafbb8e861538769798d48350dd885dc65"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gafbb8e861538769798d48350dd885dc65">XDmaPs_DoneISR_5</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:gafbb8e861538769798d48350dd885dc65"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 5.  <a href="#gafbb8e861538769798d48350dd885dc65">More...</a><br/></td></tr>
<tr class="separator:gafbb8e861538769798d48350dd885dc65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2946a438ecf5fd79ca346254c69ba208"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga2946a438ecf5fd79ca346254c69ba208">XDmaPs_DoneISR_6</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga2946a438ecf5fd79ca346254c69ba208"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 6.  <a href="#ga2946a438ecf5fd79ca346254c69ba208">More...</a><br/></td></tr>
<tr class="separator:ga2946a438ecf5fd79ca346254c69ba208"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga42bc1b1e99ac5ea705d1a707f4618fc3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga42bc1b1e99ac5ea705d1a707f4618fc3">XDmaPs_DoneISR_7</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga42bc1b1e99ac5ea705d1a707f4618fc3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Driver done interrupt service routine for channel 7.  <a href="#ga42bc1b1e99ac5ea705d1a707f4618fc3">More...</a><br/></td></tr>
<tr class="separator:ga42bc1b1e99ac5ea705d1a707f4618fc3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24d151e510be2f13777cc85a563c6bbd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga24d151e510be2f13777cc85a563c6bbd">XDmaPs_Print_DmaProg</a> (<a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *Cmd)</td></tr>
<tr class="memdesc:ga24d151e510be2f13777cc85a563c6bbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Print the Dma Prog Contents.  <a href="#ga24d151e510be2f13777cc85a563c6bbd">More...</a><br/></td></tr>
<tr class="separator:ga24d151e510be2f13777cc85a563c6bbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaded11d6e3cc80b1604cf0af0da063b35"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#gaded11d6e3cc80b1604cf0af0da063b35">XDmaPs_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:gaded11d6e3cc80b1604cf0af0da063b35"><td class="mdescLeft">&#160;</td><td class="mdescRight">Looks up the device configuration based on the unique device ID.  <a href="#gaded11d6e3cc80b1604cf0af0da063b35">More...</a><br/></td></tr>
<tr class="separator:gaded11d6e3cc80b1604cf0af0da063b35"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga711e54b9c033b127fb582bde320f8823"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga711e54b9c033b127fb582bde320f8823">XDmaPs_SelfTest</a> (<a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *InstPtr)</td></tr>
<tr class="memdesc:ga711e54b9c033b127fb582bde320f8823"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function runs a self-test on the driver and hardware device.  <a href="#ga711e54b9c033b127fb582bde320f8823">More...</a><br/></td></tr>
<tr class="separator:ga711e54b9c033b127fb582bde320f8823"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1979923efe3208602a8e4ba6ff2aff32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga1979923efe3208602a8e4ba6ff2aff32">XDmaPs_ResetHw</a> (u32 BaseAddress)</td></tr>
<tr class="memdesc:ga1979923efe3208602a8e4ba6ff2aff32"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function perform the reset sequence to the given dmaps interface by configuring the appropriate control bits in the dmaps specifc registers the dmaps reset squence involves the following steps Disable all the interuupts Clear the pending interrupts Kill all the active channel threads Kill the manager thread.  <a href="#ga1979923efe3208602a8e4ba6ff2aff32">More...</a><br/></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:ga30041b023ab8bf2433d4b714dda036cb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga30041b023ab8bf2433d4b714dda036cb">XDmaPs_ConfigTable</a> []</td></tr>
<tr class="memdesc:ga30041b023ab8bf2433d4b714dda036cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Each <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> device in the system has an entry in this table.  <a href="#ga30041b023ab8bf2433d4b714dda036cb">More...</a><br/></td></tr>
<tr class="separator:ga30041b023ab8bf2433d4b714dda036cb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga30041b023ab8bf2433d4b714dda036cb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dmaps.html#ga30041b023ab8bf2433d4b714dda036cb">XDmaPs_ConfigTable</a> []</td></tr>
<tr class="memdesc:ga30041b023ab8bf2433d4b714dda036cb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Each <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> device in the system has an entry in this table.  <a href="#ga30041b023ab8bf2433d4b714dda036cb">More...</a><br/></td></tr>
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</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Register Map</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp092729737d14686054aa21531a3582c6"></a>Register offsets for the DMAC. </p>
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<tr class="memitem:ga93bf462eb200bc133898157d9f846216"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga93bf462eb200bc133898157d9f846216"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DS_OFFSET</b>&#160;&#160;&#160;0x000 /* DMA Status Register */</td></tr>
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<tr class="memitem:ga2d7a3784cb90df8727eb8d9b641c52ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga2d7a3784cb90df8727eb8d9b641c52ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DPC_OFFSET</b>&#160;&#160;&#160;0x004 /* DMA Program Counter Rregister */</td></tr>
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<tr class="memitem:gac5af210b0cfdc4d966f5f2f72c481118"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac5af210b0cfdc4d966f5f2f72c481118"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_INTEN_OFFSET</b>&#160;&#160;&#160;0X020 /* DMA Interrupt Enable Register */</td></tr>
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<tr class="memitem:gaf5e9b4b7a576ad28f0956df9de5c1107"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf5e9b4b7a576ad28f0956df9de5c1107"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_ES_OFFSET</b>&#160;&#160;&#160;0x024 /* DMA Event Status Register */</td></tr>
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<tr class="memitem:gab6f325a35bd281ac14c9c29b35b6129d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab6f325a35bd281ac14c9c29b35b6129d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_INTSTATUS_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_INTCLR_OFFSET</b>&#160;&#160;&#160;0x02c /* DMA Interrupt Clear Register */</td></tr>
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<tr class="memitem:gab7dedb8effa3858610d91288f555f256"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gab7dedb8effa3858610d91288f555f256"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_FSM_OFFSET</b></td></tr>
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<tr class="memitem:ga6b32c35e65f9417be809dadfc916fb6f"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga6b32c35e65f9417be809dadfc916fb6f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_FSC_OFFSET</b></td></tr>
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<tr class="memitem:ga262f99b540ef6e67c44fcc5f1682c3dc"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga262f99b540ef6e67c44fcc5f1682c3dc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_FTM_OFFSET</b>&#160;&#160;&#160;0x038 /* DMA Fault Type DMA Manager Register */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_FTC0_OFFSET</b>&#160;&#160;&#160;0x040 /* DMA Fault Type for DMA Channel 0 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_FTCn_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_FTC0_OFFSET + (ch) * 4)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CS0_OFFSET</b>&#160;&#160;&#160;0x100 /* Channel Status for DMA Channel 0 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_CSn_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_CS0_OFFSET + (ch) * 8)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CPC0_OFFSET</b></td></tr>
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<tr class="memitem:ga44da163173636f2136fe796655af9476"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga44da163173636f2136fe796655af9476"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_CPCn_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_CPC0_OFFSET + (ch) * 8)</td></tr>
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<tr class="memitem:ga97236a9f591969f82da8fa57f3ab8261"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga97236a9f591969f82da8fa57f3ab8261"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_SA_0_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_SA_n_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_SA_0_OFFSET + (ch) * 0x20)</td></tr>
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<tr class="memitem:gac2853665b08e37e4573447ba7f4c9b6d"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gac2853665b08e37e4573447ba7f4c9b6d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DA_0_OFFSET</b></td></tr>
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<tr class="memitem:ga84df6a5346238f67309c347c44fc0611"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga84df6a5346238f67309c347c44fc0611"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_DA_n_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_DA_0_OFFSET + (ch) * 0x20)</td></tr>
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<tr class="memitem:ga681506ee18097cfa07b6ba5b5beeb866"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga681506ee18097cfa07b6ba5b5beeb866"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CC_0_OFFSET</b></td></tr>
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<tr class="memitem:ga02494d8df0fb7e492045c2cf8501588c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga02494d8df0fb7e492045c2cf8501588c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_CC_n_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_CC_0_OFFSET + (ch) * 0x20)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_LC0_0_OFFSET</b>&#160;&#160;&#160;0x40C /* Loop Counter 0 for DMA Channel 0 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_LC0_n_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_LC0_0_OFFSET + (ch) * 0x20)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_LC1_0_OFFSET</b>&#160;&#160;&#160;0x410 /* Loop Counter 1 for DMA Channel 0 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_LC1_n_OFFSET</b>(ch)&#160;&#160;&#160;(XDMAPS_LC1_0_OFFSET + (ch) * 0x20)</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DBGSTATUS_OFFSET</b>&#160;&#160;&#160;0xD00 /* Debug Status Register */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DBGCMD_OFFSET</b>&#160;&#160;&#160;0xD04 /* Debug Command Register */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DBGINST0_OFFSET</b>&#160;&#160;&#160;0xD08 /* Debug Instruction 0 Register */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DBGINST1_OFFSET</b>&#160;&#160;&#160;0xD0C /* Debug Instruction 1 Register */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CR0_OFFSET</b>&#160;&#160;&#160;0xE00 /* Configuration Register 0 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CR1_OFFSET</b>&#160;&#160;&#160;0xE04 /* Configuration Register 1 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CR2_OFFSET</b>&#160;&#160;&#160;0xE08 /* Configuration Register 2 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CR3_OFFSET</b>&#160;&#160;&#160;0xE0C /* Configuration Register 3 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CR4_OFFSET</b>&#160;&#160;&#160;0xE10 /* Configuration Register 4 */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CRDN_OFFSET</b>&#160;&#160;&#160;0xE14 /* Configuration Register Dn */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PERIPH_ID_0_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PERIPH_ID_1_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PERIPH_ID_2_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PERIPH_ID_3_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PCELL_ID_0_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PCELL_ID_1_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PCELL_ID_2_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_PCELL_ID_3_OFFSET</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DS_DMA_STATUS</b>&#160;&#160;&#160;0x0F /* DMA status mask */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DS_DMA_STATUS_STOPPED</b>&#160;&#160;&#160;0x00 /* debug status busy mask */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_DBGSTATUS_BUSY</b>&#160;&#160;&#160;0x01 /* debug status busy mask */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CS_ACTIVE_MASK</b></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDMAPS_CR1_I_CACHE_LEN_MASK</b>&#160;&#160;&#160;0x07 /* i_cache_len mask */</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>XDmaPs_DBGINST0</b>(b1, b0, ch, dbg_th)&#160;&#160;&#160;(((b1) &lt;&lt; 24) | ((b0) &lt;&lt; 16) | (((ch) &amp; 0x7) &lt;&lt; 8) | ((dbg_th &amp; 0x1)))</td></tr>
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<h2 class="groupheader">Macro Definition Documentation</h2>
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          <td class="memname">#define XDmaPs_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegisterValue&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;Xil_Out32((BaseAddress) + (RegOffset), (RegisterValue))</td>
        </tr>
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<p>Write a DMAC register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>contains the base address of the device. </td></tr>
    <tr><td class="paramname">RegOffset</td><td>contains the offset from the base address of the device. </td></tr>
    <tr><td class="paramname">RegisterValue</td><td>is the value to be written to the register.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-Style signature: void XDmaPs_WriteReg(u32 BaseAddress, int RegOffset, u32 RegisterValue) </dd></dl>

<p>Referenced by <a class="el" href="group__dmaps.html#ga1979923efe3208602a8e4ba6ff2aff32">XDmaPs_ResetHw()</a>, and <a class="el" href="group__dmaps.html#ga3691ba115c788c4f68a05cf05c486eeb">XDmaPs_Start()</a>.</p>

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<h2 class="groupheader">Typedef Documentation</h2>
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          <td class="memname">typedef void(* XDmaPsDoneHandler)(unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *DmaCmd, void *CallbackRef)</td>
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<p>It's the done handler a user can set for a channel. </p>

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          <td class="memname">typedef void(* XDmaPsFaultHandler)(unsigned int Channel, <a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *DmaCmd, void *CallbackRef)</td>
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<p>It's the fault handler a user can set for a channel. </p>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">int XDmaPs_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a> *&#160;</td>
          <td class="paramname"><em>Config</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Initializes a specific <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> instance such that it is ready to be used. </p>
<p>The data format of the device is setup for 8 data bits, 1 stop bit, and no parity by default. The baud rate is set to a default value specified by Config-&gt;DefaultBaudRate if set, otherwise it is set to 19.2K baud. The receive FIFO threshold is set for 8 bytes. The default operating mode of the driver is polled mode.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is a pointer to the <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> instance. </td></tr>
    <tr><td class="paramname">Config</td><td>is a reference to a structure containing information about a specific <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> driver. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, pass in the physical address instead.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><pre class="fragment">    - XST_SUCCESS on initialization completion
</pre></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___config.html#a5f381d00a2979ddc281fc8d48d0f7b2a">XDmaPs_Config::BaseAddress</a>, <a class="el" href="struct_x_dma_ps.html#a61881a8aab6272aa815bdbb8babf3a41">XDmaPs::CacheLength</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#a688c5e3052dbb1956fb8139e44cc4c8e">XDmaPs_ChannelData::ChanId</a>, <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, <a class="el" href="struct_x_dma_ps.html#a45c4061741c55585776f412090ef1667">XDmaPs::Config</a>, <a class="el" href="struct_x_dma_ps___config.html#ae27d8bc91c6f9622c69ab81d9ba39dbb">XDmaPs_Config::DeviceId</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#a08d8c39e4ba2390ea88c95a39d820e50">XDmaPs_ChannelData::DevId</a>, and <a class="el" href="struct_x_dma_ps.html#a0e39ae2cf0255dd2835c9b55449aaaf3">XDmaPs::IsReady</a>.</p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td class="memname">int XDmaPs_ConstructNestedLoop </td>
          <td>(</td>
          <td class="paramtype">char *&#160;</td>
          <td class="paramname"><em>DmaProgStart</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>CacheLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">char *&#160;</td>
          <td class="paramname"><em>DmaProgLoopStart</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>LoopCountOuter</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>LoopCountInner</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Construct a nested loop with only DMALD and DMAST in the inner loop body. </p>
<p>It uses loop counter 1 for the outer loop and loop counter 0 for the inner loop.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DmaProgStart</td><td>is the very start address of the DMA program. This is used to calculate whether the loop is in a cache line. </td></tr>
    <tr><td class="paramname">CacheLength</td><td>is the icache line length, in terms of bytes. If it's zero, the performance enhancement feature will be turned off. </td></tr>
    <tr><td class="paramname">DmaProgLoopStart</td><td>The starting address of the loop (DMALP). </td></tr>
    <tr><td class="paramname">LoopCountOuter</td><td>The outer loop count. Loop count - 1 will be used to initialize the loop counter. </td></tr>
    <tr><td class="paramname">LoopCountInner</td><td>The inner loop count. Loop count - 1 will be used to initialize the loop counter.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The number byes the nested loop program has.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__dmaps.html#gada17404db9934447c93bae5a66a71282">XDmaPs_ConstructSingleLoop()</a>.</p>

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          <td class="memname">int XDmaPs_ConstructSingleLoop </td>
          <td>(</td>
          <td class="paramtype">char *&#160;</td>
          <td class="paramname"><em>DmaProgStart</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>CacheLength</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">char *&#160;</td>
          <td class="paramname"><em>DmaProgLoopStart</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>LoopCount</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Construct a loop with only DMALD and DMAST as the body using loop counter 0. </p>
<p>The function also makes sure the loop body and the lpend is in the same cache line.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DmaProgStart</td><td>is the very start address of the DMA program. This is used to calculate whether the loop is in a cache line. </td></tr>
    <tr><td class="paramname">CacheLength</td><td>is the icache line length, in terms of bytes. If it's zero, the performance enhancement feature will be turned off. </td></tr>
    <tr><td class="paramname">DmaProgLoopStart</td><td>The starting address of the loop (DMALP). </td></tr>
    <tr><td class="paramname">LoopCount</td><td>The inner loop count. Loop count - 1 will be used to initialize the loop counter.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The number of bytes the loop has.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="group__dmaps.html#gaecba56f06526fe2ad0c8af65ff4237bb">XDmaPs_ConstructNestedLoop()</a>.</p>

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          <td class="memname">void XDmaPs_DoneISR_0 </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Driver done interrupt service routine for channel 0. </p>
<p>To avoid linkage error,modify all inline functions from extern inline to static inline for IAR compiler.</p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None.</dd></dl>
<p>Driver done interrupt service routines for the channels. We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Driver done interrupt service routine for channel 1. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Driver done interrupt service routine for channel 2. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
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      </table>
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<p>Driver done interrupt service routine for channel 3. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
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<p>Driver done interrupt service routine for channel 4. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Driver done interrupt service routine for channel 5. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Driver done interrupt service routine for channel 6. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Driver done interrupt service routine for channel 7. </p>
<p>We need this done ISR mainly because the driver needs to release the DMA program buffer. This is the one that connects the GIC</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
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<p>Driver fault interrupt service routine This is the one that connects the GIC. </p>
<p>Driver fault interrupt service routine.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___config.html#a5f381d00a2979ddc281fc8d48d0f7b2a">XDmaPs_Config::BaseAddress</a>, <a class="el" href="struct_x_dma_ps___cmd.html#ac0f1d9b27ea3e37948227028d1e0335f">XDmaPs_Cmd::ChanFaultPCAddr</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a921a09b7b950ba6e39e8426ca528c09b">XDmaPs_Cmd::ChanFaultType</a>, <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, <a class="el" href="struct_x_dma_ps.html#a45c4061741c55585776f412090ef1667">XDmaPs::Config</a>, <a class="el" href="struct_x_dma_ps___config.html#ae27d8bc91c6f9622c69ab81d9ba39dbb">XDmaPs_Config::DeviceId</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#a9c04806fc749b5053f2ae3327d897281">XDmaPs_ChannelData::DmaCmdFromHw</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#aea6a90655d2a8abf180cf32733abc2a3">XDmaPs_ChannelData::DmaCmdToHw</a>, <a class="el" href="struct_x_dma_ps___cmd.html#abbf6132cc94289f3c47d3f05d12ad0bb">XDmaPs_Cmd::DmaStatus</a>, <a class="el" href="struct_x_dma_ps.html#ade567db033942a4601c95b04761906e2">XDmaPs::FaultHandler</a>, <a class="el" href="struct_x_dma_ps.html#a4be3d7e948f1eb200b732a36e021b678">XDmaPs::FaultRef</a>, <a class="el" href="struct_x_dma_ps___cmd.html#aeb883ad07b5cee4971b7192b2c0058ac">XDmaPs_Cmd::GeneratedDmaProg</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#a0d07377a17ee1ed816fa3bde5ac52c47">XDmaPs_ChannelData::HoldDmaProg</a>, and <a class="el" href="struct_x_dma_ps___channel_data.html#ad258334833157a5499605e16b821c582">XDmaPs_ChannelData::ProgBufPool</a>.</p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#a69309a8745a0da1d5f146f22fd48da9d">SetupInterruptSystem()</a>, and <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td class="memname">int XDmaPs_FreeDmaProg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *&#160;</td>
          <td class="paramname"><em>Cmd</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Free the DMA program buffer that is pointed by the GeneratedDmaProg field of the command. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is then DMA instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>is the DMA channel number. </td></tr>
    <tr><td class="paramname">Cmd</td><td>is the DMA command.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XST_SUCCESS on success. XST_FAILURE if there is any error.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, <a class="el" href="struct_x_dma_ps___cmd.html#aeb883ad07b5cee4971b7192b2c0058ac">XDmaPs_Cmd::GeneratedDmaProg</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a27e023d00ef6ff3085e3dd2c9d061bfa">XDmaPs_Cmd::GeneratedDmaProgLength</a>, and <a class="el" href="struct_x_dma_ps___channel_data.html#ad258334833157a5499605e16b821c582">XDmaPs_ChannelData::ProgBufPool</a>.</p>

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          <td class="memname">int XDmaPs_GenDmaProg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *&#160;</td>
          <td class="paramname"><em>Cmd</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Generate a DMA program based for the DMA command, the buffer will be pointed by the GeneratedDmaProg field of the command. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is then DMA instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>is the DMA channel number. </td></tr>
    <tr><td class="paramname">Cmd</td><td>is the DMA command.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>- XST_SUCCESS on success.<ul>
<li>XST_FAILURE if it fails</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___cmd.html#a1002d3474d28e67143b5bc3c30f23b95">XDmaPs_Cmd::BD</a>, <a class="el" href="struct_x_dma_ps.html#a61881a8aab6272aa815bdbb8babf3a41">XDmaPs::CacheLength</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a188b831f0227eb1b2fdca11ba0582d96">XDmaPs_Cmd::ChanCtrl</a>, <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, <a class="el" href="struct_x_dma_ps___b_d.html#a1c8be35d883d27d0f838358712c42dc4">XDmaPs_BD::DstAddr</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a853e35c04d6373b1c91b4d3b85fd21ab">XDmaPs_ChanCtrl::DstBurstLen</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a35b7ed4be966942dca1a4732494068e5">XDmaPs_ChanCtrl::DstBurstSize</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#ae02d61b30e6bf2940560c5719cf78ea9">XDmaPs_ChanCtrl::DstInc</a>, <a class="el" href="struct_x_dma_ps___cmd.html#aeb883ad07b5cee4971b7192b2c0058ac">XDmaPs_Cmd::GeneratedDmaProg</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a27e023d00ef6ff3085e3dd2c9d061bfa">XDmaPs_Cmd::GeneratedDmaProgLength</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#ad258334833157a5499605e16b821c582">XDmaPs_ChannelData::ProgBufPool</a>, <a class="el" href="struct_x_dma_ps___b_d.html#aa9542ecca6c6f359cc8e9c44ad2e276f">XDmaPs_BD::SrcAddr</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#af1c78aea07f0790355317bd311ebb3ff">XDmaPs_ChanCtrl::SrcBurstLen</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a17ee9116237a176efec405cb12461288">XDmaPs_ChanCtrl::SrcBurstSize</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a3585627ef02899b75c5f2f716d3ab52f">XDmaPs_ChanCtrl::SrcInc</a>, and <a class="el" href="group__dmaps.html#ga24d151e510be2f13777cc85a563c6bbd">XDmaPs_Print_DmaProg()</a>.</p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga3691ba115c788c4f68a05cf05c486eeb">XDmaPs_Start()</a>.</p>

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          <td class="memname">int XDmaPs_Instr_DMARMB </td>
          <td>(</td>
          <td class="paramtype">char *&#160;</td>
          <td class="paramname"><em>DmaProg</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Construction function for DMARMB instruction. </p>
<p>This function fills the program buffer with the constructed instruction.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DmaProg</td><td>is the DMA program buffer, it's the starting address for the instruction being constructed</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The number of bytes for this instruction which is 1.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">int XDmaPs_Instr_DMAWMB </td>
          <td>(</td>
          <td class="paramtype">char *&#160;</td>
          <td class="paramname"><em>DmaProg</em></td><td>)</td>
          <td></td>
        </tr>
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<p>Construction function for DMAWMB instruction. </p>
<p>This function fills the program buffer with the constructed instruction.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DmaProg</td><td>is the DMA program buffer, it's the starting address for the instruction being constructed</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The number of bytes for this instruction which is 1.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">int XDmaPs_IsActive </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>Channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Checks whether the DMA channel is active or idle. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>is the DMA channel number.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0: if the channel is idle 1: otherwise</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, and <a class="el" href="struct_x_dma_ps___channel_data.html#aea6a90655d2a8abf180cf32733abc2a3">XDmaPs_ChannelData::DmaCmdToHw</a>.</p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga3691ba115c788c4f68a05cf05c486eeb">XDmaPs_Start()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a> * XDmaPs_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
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<p>Looks up the device configuration based on the unique device ID. </p>
<p>The table contains the configuration info for each device in the system.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>contains the ID of the device</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<p>A pointer to the configuration structure or NULL if the specified device is not in the system.</p>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>None. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td class="memname">void XDmaPs_Print_DmaProg </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *&#160;</td>
          <td class="paramname"><em>Cmd</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Print the Dma Prog Contents. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Cmd</td><td>is the command buffer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___cmd.html#aeb883ad07b5cee4971b7192b2c0058ac">XDmaPs_Cmd::GeneratedDmaProg</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a27e023d00ef6ff3085e3dd2c9d061bfa">XDmaPs_Cmd::GeneratedDmaProgLength</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a6ab4fb40a229c7fe11501b45554923b9">XDmaPs_Cmd::UserDmaProg</a>, and <a class="el" href="struct_x_dma_ps___cmd.html#a89109285101fd4eee7031df58ce0eb9b">XDmaPs_Cmd::UserDmaProgLength</a>.</p>

<p>Referenced by <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>.</p>

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          <td class="memname">int XDmaPs_ResetChannel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>Channel</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Reset the specified DMA Channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>is the channel to be reset.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 on success, -1 on time out</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___config.html#a5f381d00a2979ddc281fc8d48d0f7b2a">XDmaPs_Config::BaseAddress</a>, and <a class="el" href="struct_x_dma_ps.html#a45c4061741c55585776f412090ef1667">XDmaPs::Config</a>.</p>

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          <td class="memname">void XDmaPs_ResetHw </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BaseAddress</em></td><td>)</td>
          <td></td>
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<p>This function perform the reset sequence to the given dmaps interface by configuring the appropriate control bits in the dmaps specifc registers the dmaps reset squence involves the following steps Disable all the interuupts Clear the pending interrupts Kill all the active channel threads Kill the manager thread. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>of the interface</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>N/A</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function will not modify the slcr registers that are relavant for dmaps controller </dd></dl>

<p>References <a class="el" href="group__dmaps.html#gae19e877d6bba369f3e2e8e806b36f594">XDmaPs_WriteReg</a>.</p>

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          <td class="memname">int XDmaPs_ResetManager </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Reset the DMA Manager. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>0 on success, -1 on time out</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___config.html#a5f381d00a2979ddc281fc8d48d0f7b2a">XDmaPs_Config::BaseAddress</a>, and <a class="el" href="struct_x_dma_ps.html#a45c4061741c55585776f412090ef1667">XDmaPs::Config</a>.</p>

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          <td class="memname">int XDmaPs_SelfTest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em></td><td>)</td>
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<p>This function runs a self-test on the driver and hardware device. </p>
<p>This self test performs a local loopback and verifies data can be sent and received.</p>
<p>The time for this test is proportional to the baud rate that has been set prior to calling this function.</p>
<p>The mode and control registers are restored before return.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is a pointer to the <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> instance</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><pre class="fragment">    - XST_SUCCESS if the test was successful
    - XST_FAILURE if the test failed
</pre></dd></dl>
<dl class="section note"><dt>Note</dt><dd></dd></dl>
<p>This function can hang if the hardware is not functioning properly. </p>

<p>References <a class="el" href="struct_x_dma_ps___config.html#a5f381d00a2979ddc281fc8d48d0f7b2a">XDmaPs_Config::BaseAddress</a>, and <a class="el" href="struct_x_dma_ps.html#a45c4061741c55585776f412090ef1667">XDmaPs::Config</a>.</p>

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          <td class="memname">int XDmaPs_SetDoneHandler </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__dmaps.html#gad59232da2016e1a60744cc6e11a04a98">XDmaPsDoneHandler</a>&#160;</td>
          <td class="paramname"><em>DoneHandler</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Set the done handler for a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>is the channel number. </td></tr>
    <tr><td class="paramname">DoneHandler</td><td>is the done interrupt handler. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is the callback reference data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#a467e0893ad92dabed349617cfefb56be">XDmaPs_ChannelData::DoneHandler</a>, and <a class="el" href="struct_x_dma_ps___channel_data.html#a0816a57a2212df7c540c3f2ea7e7b3b0">XDmaPs_ChannelData::DoneRef</a>.</p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="group__dmaps.html#ga5dba8cc7cd39c53eed1dabac803ce74f">XDmaPsFaultHandler</a>&#160;</td>
          <td class="paramname"><em>FaultHandler</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallbackRef</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Set the fault handler for a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is the DMA instance. </td></tr>
    <tr><td class="paramname">FaultHandler</td><td>is the fault interrupt handler. </td></tr>
    <tr><td class="paramname">CallbackRef</td><td>is the callback reference data.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps.html#ade567db033942a4601c95b04761906e2">XDmaPs::FaultHandler</a>, and <a class="el" href="struct_x_dma_ps.html#a4be3d7e948f1eb200b732a36e021b678">XDmaPs::FaultRef</a>.</p>

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          <td class="memname">int XDmaPs_Start </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps.html">XDmaPs</a> *&#160;</td>
          <td class="paramname"><em>InstPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">unsigned int&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps___cmd.html">XDmaPs_Cmd</a> *&#160;</td>
          <td class="paramname"><em>Cmd</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>HoldDmaProg</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
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<p>Start a DMA command. </p>
<p>The command can only be invoked when the channel is idle. The driver takes the command, generates DMA program if needed, then pass the program to DMAC to execute.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstPtr</td><td>is then DMA instance. </td></tr>
    <tr><td class="paramname">Channel</td><td>is the DMA channel number. </td></tr>
    <tr><td class="paramname">Cmd</td><td>is the DMA command. </td></tr>
    <tr><td class="paramname">HoldDmaProg</td><td>is tag indicating whether the driver can release the allocated DMA buffer or not. If a user wants to examine the generated DMA program, the flag should be set to 1. After the DMA program is finished, a user needs to explicity free the buffer.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS on success</li>
<li>XST_DEVICE_BUSY if DMA is busy</li>
<li>XST_FAILURE on other failures</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___config.html#a5f381d00a2979ddc281fc8d48d0f7b2a">XDmaPs_Config::BaseAddress</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a1002d3474d28e67143b5bc3c30f23b95">XDmaPs_Cmd::BD</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a188b831f0227eb1b2fdca11ba0582d96">XDmaPs_Cmd::ChanCtrl</a>, <a class="el" href="struct_x_dma_ps.html#afb46f6085dc9e591775679f026025819">XDmaPs::Chans</a>, <a class="el" href="struct_x_dma_ps.html#a45c4061741c55585776f412090ef1667">XDmaPs::Config</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#aea6a90655d2a8abf180cf32733abc2a3">XDmaPs_ChannelData::DmaCmdToHw</a>, <a class="el" href="struct_x_dma_ps___cmd.html#abbf6132cc94289f3c47d3f05d12ad0bb">XDmaPs_Cmd::DmaStatus</a>, <a class="el" href="struct_x_dma_ps___b_d.html#a1c8be35d883d27d0f838358712c42dc4">XDmaPs_BD::DstAddr</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#ae02d61b30e6bf2940560c5719cf78ea9">XDmaPs_ChanCtrl::DstInc</a>, <a class="el" href="struct_x_dma_ps___cmd.html#aeb883ad07b5cee4971b7192b2c0058ac">XDmaPs_Cmd::GeneratedDmaProg</a>, <a class="el" href="struct_x_dma_ps___channel_data.html#a0d07377a17ee1ed816fa3bde5ac52c47">XDmaPs_ChannelData::HoldDmaProg</a>, <a class="el" href="struct_x_dma_ps___b_d.html#aad07616e4eedd92b727b6c9b99d77ace">XDmaPs_BD::Length</a>, <a class="el" href="struct_x_dma_ps___b_d.html#aa9542ecca6c6f359cc8e9c44ad2e276f">XDmaPs_BD::SrcAddr</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a3585627ef02899b75c5f2f716d3ab52f">XDmaPs_ChanCtrl::SrcInc</a>, <a class="el" href="struct_x_dma_ps___cmd.html#a6ab4fb40a229c7fe11501b45554923b9">XDmaPs_Cmd::UserDmaProg</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, <a class="el" href="group__dmaps.html#ga05047e523efd0dcc0e1f3ba16a32a796">XDmaPs_IsActive()</a>, and <a class="el" href="group__dmaps.html#gae19e877d6bba369f3e2e8e806b36f594">XDmaPs_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>.</p>

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          <td class="memname">u32 XDmaPs_ToCCRValue </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_dma_ps___chan_ctrl.html">XDmaPs_ChanCtrl</a> *&#160;</td>
          <td class="paramname"><em>ChanCtrl</em></td><td>)</td>
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<p>Conversion function from PL330 bus transfer descriptors to CCR value. </p>
<p>All the values passed to the functions are in terms of assembly languages, not in terms of the register bit encoding.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">ChanCtrl</td><td>is the Instance of <a class="el" href="struct_x_dma_ps___chan_ctrl.html" title="DMA channle control structure. ">XDmaPs_ChanCtrl</a>.</td></tr>
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<dl class="section return"><dt>Returns</dt><dd>The 32-bit CCR value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a853e35c04d6373b1c91b4d3b85fd21ab">XDmaPs_ChanCtrl::DstBurstLen</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a35b7ed4be966942dca1a4732494068e5">XDmaPs_ChanCtrl::DstBurstSize</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a39c795a67feb2cee1761d7a968e233f3">XDmaPs_ChanCtrl::DstCacheCtrl</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#ae02d61b30e6bf2940560c5719cf78ea9">XDmaPs_ChanCtrl::DstInc</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#ad3dc23d0ec01d4f49debed893cffa52d">XDmaPs_ChanCtrl::DstProtCtrl</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#ab4afe06f49cc4f916ef106f1e9e367f2">XDmaPs_ChanCtrl::EndianSwapSize</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#af1c78aea07f0790355317bd311ebb3ff">XDmaPs_ChanCtrl::SrcBurstLen</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a17ee9116237a176efec405cb12461288">XDmaPs_ChanCtrl::SrcBurstSize</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a792a21894718b12c8ccf1fa97318dbbf">XDmaPs_ChanCtrl::SrcCacheCtrl</a>, <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a3585627ef02899b75c5f2f716d3ab52f">XDmaPs_ChanCtrl::SrcInc</a>, and <a class="el" href="struct_x_dma_ps___chan_ctrl.html#a3dd33f6f79803e204573e5ca5d88d9d9">XDmaPs_ChanCtrl::SrcProtCtrl</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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          <td class="memname"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a> XDmaPs_ConfigTable[]</td>
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<p>Each <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> device in the system has an entry in this table. </p>

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          <td class="memname"><a class="el" href="struct_x_dma_ps___config.html">XDmaPs_Config</a> XDmaPs_ConfigTable[]</td>
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<b>Initial value:</b><div class="fragment"><div class="line">= {</div>
<div class="line">        {</div>
<div class="line">                XPAR_XDMAPS_0_DEVICE_ID,</div>
<div class="line">                XPAR_XDMAPS_0_BASEADDR,</div>
<div class="line">        },</div>
<div class="line">}</div>
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<p>Each <a class="el" href="struct_x_dma_ps.html" title="The XDmaPs driver instance data structure. ">XDmaPs</a> device in the system has an entry in this table. </p>

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